On Eliminating Redundant Computation from High-Level Array Statements

نویسنده

  • Steven J. Deitz
چکیده

High-level array programming languages are well-suited for scientific computing. Such languages free the programmer from the responsibility of managing burdensome low-level details that complicate programming in languages like C and Fortran. But these details do not vanish. We argue that the compiler should relieve the programmer of this burden. In this paper, we present a compiler optimization called partial array redundancy elimination that removes redundant computation from certain high-level array statements resulting in cleaner, more portable and more concise code without any performance loss. This optimization is critical to certain codes and achieves a speedup of 36% on the NAS MG parallel benchmark.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Subregion Analysis and Bounds Check Elimination for High Level Arrays

For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS languages (Chapel, Fortress and X10) advocate the use of high-level arrays for improved productivity. For example, high-level arrays in the X10 language support rank-independent specification of multidimensional loop and arr...

متن کامل

Deriving Pre-conditions for Array Bound Check Elimination

We present a high-level approach to array bound check optimization that is neither hampered by recursive functions, nor disabled by the presence of partially redundant checks. Our approach combines a forward analysis to infer precise contextual constraint at designated program points, and a backward method for deriving a safety pre-condition for each bound check. Both analyses are formulated wi...

متن کامل

FPGAs for expression level parallel processing

Memory mapped field programmable gate arrays (FPGAs) can be used to add expression level parallel processing to microprocessor-based systems. Multi-operand expressions can be computed in combinational logic eliminating microprocessor computation steps. FPGAs can capture operands as variables are assigned new values, eliminating separate load-stores to pass operands. Expressions can be for compu...

متن کامل

A Hardware Accelerator with Variable Pixel Representation & Skip Mode Prediction for Feature Point Detection Part of SIFT Algorithm

Scale Invariant Feature Transform (SIFT) is well accepted as a robust feature point detection algorithm, which is invariant to rotation, scaling, illumination and viewpoint changes. Though powerful, high computation complexity acts as a bottleneck of the real-time systems. It is not until recently that the only hardware implementation scheme is proposed to reach real-time processing. In this pa...

متن کامل

On Using Volume Computation to Estimate the Work Distribution for Parallel Programs

In this paper we describe a performance parameter which models the work contained in a parallel program and the corresponding work distribution. The work distribution is modeled at the program level which carefully distinguishes between useful and redundant work. We achieve high accuracy due to aggressive exploitation of compiler knowledge such as loop iteration spaces, array access patterns an...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2000